J-Flash SPI - A Powerful and Easy-to-Use Software for SPI Flash Programming
flashrom is a utility for identifying, reading, writing, verifying and erasing flash chips. It is designed to flash BIOS/EFI/coreboot/firmware/optionROM images on mainboards, network/graphics/storage controller cards, and various other programmer devices.
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Updates are free of charge. Update consist of software update (pc application) and firmware update (software inside the device). Latest software can be downloaded directly from our webpage. You will be informed by the software about possible updates after connecting out of date device.
Infineon offers the following software for programming various devices. You can use the software to Program, Erase, Verify, and Read the target device's flash. Each programming solution is part of a complete ecosystem.
This software replaces the earlier Nand Flash Image Generator, and can be used to generate bootable Nand Flash or SPI Flash images that contain both the player code and the Ogg Vorbis music files. It is meant for pre-programming the contents of the flash with a memory programmer before soldering the chips.
This release supports single-level-cell, single-plane Nand Flash devices such as the NAND128W or K9F2G08 and SPI flash memories in the range of 128 kilobytes to 16 megabytes (24-bit addressable) such as the Winbond W25X16, Eon EN25P16 or Intel QH25F640S33B8 "S33" series chips. Default player application software is provided. Custom player software can be made using the vskit133 compiler package. USB can not be used with this application.
The Microsemi FlashPro programming system is a combination of FlashPro software and hardware programmer. Together they provide ISP for flash-based FPGA devices: PolarFire, IGLOO2, SmartFusion2, RTG4, IGLOO/e, ProASIC3 (including RT ProASIC3), SmartFusion, Fusion, and ProASICPLUS families.
The standard test and programming language (STAPL) Player may be used to program ProASICPLUS and third-generation flash devices such as IGLOO, ProASIC3, ProASIC3L, Fusion, and interprets the contents of a STAPL file generated by Microsemi's Libero IDE and Designer software tools. The file contains information about the programming of ProASICPLUS devices and JTAG scan chain for a single device. The data format is a JEDEC standard known as the STAPL format. The STAPL Player reads the STAPL file and executes the file's programming instructions. As all programming details are in the STAPL file, the STAPL Player is device-independent.
SP328/SP328P is the latest high-speed mass production programmer of SPI FLASH, which fully supports the high-speed mass production of SPI NOR/NAND FLASH and I2C/MicroWire EEPROMs from domestic and foreign manufacturers. High-speed MCU+FPGA architecture, built-in hardware driver engine and IO dynamic allocation technology, support QUAD (four-channel) mode of SPI FLASH, USB2.0 high-speed (480Mbps) communication interface, use internal memory instead of conventional external SD/CF card Save burning engineering files..., multiple innovations and leading technologies ensure efficient mass production and stability. The actual measurement of a GD5F1GQ4UB (1Gb SPI NAND) requires only 103s (erasing + programming + verification), which is significantly ahead of similar products. The programmer is equipped with the first generation of the programmer control interface (ATE), which supports the automatic programming machine of various manufacturers. Offline programming project files can be downloaded from the computer or loaded from the USB flash drive.
Flash Programming Utilities: A GUI-based or command line C8051 programmer that allows the user to download code to a device and perform other memory operations without needing to use the IDE. Found here. For more information see AN117
Production Programmer: A standalone tool similar to the flash programmer and Simplicity Commander but targeted more for rapid production programming of many devices. For more information see the MCU Software pages.
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Flash porgrammer runs on target platform which takes care of receiving the images from Uniflash hostutility and programming them onto flash devices. Flash programmer communicates with Uniflash host utilityover the UART interface.
Host utility runs on host machine which provides Command-line Interface (CLI) to communicate with flash programmer.Windows and Linux are the supported OS platforms for running Uniflash host utility. Host utility uses UART or JTAGinterface to download the flash programmer to the target platform. All data transfers betweenUniflash host utility and Flash programmer happens over UART interface.
Below table shows the platforms supported by Uniflash and flash devices supported on each platform.Download mode indicates the mode of communication for downloading flash programmer to target platform.
Uniflash provides two modes of communication for downloading the flash programmer - UART and JTAG.In JTAG mode Uniflash commnad-line interface is supported for most of the platforms.Manual loading of the flash programmer through CCS is required for few cases.Below diagram shows the execution steps for flashing the application images based on the Uniflashsupported mode for downloading the flash programmer.
MIMAS V2 is a feature-packed yet low-cost FPGA Development board featuring AMD Spartan-6 FPGA. MIMAS V2 is specially designed for experimenting and learning system design with FPGAs. This development board features AMD SPARTAN XC6SLX9 CSG324 FPGA with onboard 512Mb DDR SDRAM. The USB 2.0 interface provides fast and easy configuration download to the onboard SPI flash. No need to buy an expensive programmer or special downloader cable to download the bitstream to the board.
When using this method, J-Link is indirectly connected to the SPI flash. This means J-Link is connected to the MCU via the regular debug header and downloads some code into RAM that configures and handles the SPI unit of the MCU that is connected to the flash.J-Link will connect to the MCU using the regular target interface (usually, JTAG or SWD).
The SPI flash is connected to an SPI unit of the CPU via CLK, MOSI, MISO, nCS pins. This is the minimum connection needed to store data on the SPI flash and get data from it.This connection actually works with any CPU that provides an SPI unit. The SPI flash can only be accessed by explicitly sending commands to it via the SPI unit, in order to erase/program or read the flash.The user software needs to manually copy SPI flash contents over to RAM and jump to them, in case code stored in the SPI flash, shall be executed.
In XIP mode, the 1-byte command phase is omitted, to save some bandwidth. As there is no real standard regarding how to enter/exit XIP mode and this is different for various flashes, the flashloaders that are shipped with the J-Link software package do not support programming of SPI flash when it is in XIP mode.In order to support programming of a specific SPI flash that is in XIP mode, a specific flashloader for that specific SPI flash is needed. There are the following options to get such a flashloader:
As mentioned above, an SPI flash operation can be divided into different phases. By default, all phases are executed in serial mode, meaning data is transmitted to the SPI flash via MOSI (DQ0) and received by the CPU via MISO (DQ1), meaning one bit is transmitted per SPI clock. There are some read commands that allow to transmit the address + dummy cycle + data phase in quad mode (4-bits per SPI clock), meaning data throughput is 4 times the one in serial mode. However, some flashes also support a "quad protocol" where all phases for all commands are transmitted in quad mode. All SPI flashes by default boot in serial mode to allow to use a generic protocol to communicate with these flashes. For some of SPI flashes it is possible to configure them via non-volatile configuration bits to boot using the quad protocol, by default, making things slightly faster because some clocks are saved during command transmission, but also making things non-generic and flash device specific because not all flashes support this mode, there is no standard how to enter this mode, there is no possibility for the QSPI controller of the MCU to detect if this mode is active (it needs to be known)The flashloaders that are shipped with the J-Link software package do not support the quad protocol for all commands.In general, the small performance improvement by using quad protocol for the command phase as well, is not that significant that it is worth losing J-Link flash download support and general portability, in return.
The J-Link also has the option of further software enhancements with the production flash programming utility (J-Flash). The ability to take full advantage of the development environment using the Unlimited Flash Breakpoint module also means you free your development from the hardware breakpoint restriction. In this test, J-Link is the clear winner.
J-Flash Lite is a free, simple graphical user interface which allows downloading into flash memory of target systems. J-Flash Lite is part of the J-Link Software and Documentation package, available for download here. How to perform downloading into flash via J-Flash Lite:
Flasher is a programming tool for all common devices with internal or external flash memory. For a list of all supported devices click here. Flasher ARM is designed for programming flash targets with the J-Flash software or stand-alone.
Once the Flash memory has been erased, the FPGA programming file, embedded software file, or .bin file can be downloaded. From the Download region of the In System Flash Memory Controller For Xilinx Spartan-3AN dialog, press the ... button to the right of the File Name field. The Choose FPGA Programming File Or Embedded Software File For Download dialog will appear. Use this dialog to browse to, and open, the required file.
SF600Plus-G2 is a high-speed Serial NOR/NAND Flash programmer with In-Circuit Programming (update the SPI Flash soldered on board) and Standalone programming (update the SPI Flash in the socket adaptor) Mode. With DediProg SF software and the USB, it offers friendly user interfaces and powerful features.